Manufacturing package: voltage_divider_routed.kicad_pcb
Fabrication target: jlcpcb
Mode: assembly (SMT placement plus manual through-hole assembly)

Hand-solder after SMT assembly: J1, J2

Fresh kct check and refilled native KiCad DRC: zero errors.
Per-rule kct warnings: none.
Per-rule native KiCad warnings: none.
All assembly-affecting warning counts are zero. No accepted-risk waivers.
Procurement identities reviewed against supplier listings; see procurement-review.md and source project.kct.

Files:
README.txt: Package contents and assembly instructions
assembly-back.pdf: Back copper/silkscreen/outline drawing
assembly-front.pdf: Front copper/silkscreen/outline drawing
bom_jlcpcb.csv: Verified component identities for sourcing
check-report.json: kct manufacturing/electrical evidence
cpl_jlcpcb.csv: SMT placement coordinates; excludes hand-solder parts
gerbers/gerbers.zip: Gerber and drill files for PCB fabrication
images/assembly.png: Board/schematic preview image
images/layer_B_Cu.png: Board/schematic preview image
images/layer_F_Cu.png: Board/schematic preview image
images/pcb_back.png: Board/schematic preview image
images/pcb_copper.png: Board/schematic preview image
images/pcb_front.png: Board/schematic preview image
images/schematic_voltage_divider.png: Board/schematic preview image
kicad_project.zip: KiCad PCB, schematic and project sources
manifest.json: Full-package SHA256 checksums
native-drc.json: Independent native KiCad DRC with zone refill
procurement-review.md: Supplier identity review and sources
report.md: Design report text
report.pdf: Design report
schematic.pdf: Schematic drawing