Sensored BLDC Controller
Assembly ready · 1 known issueSensored BLDC Controller
05-bldc-motor-controller
Manufacturing readiness
Checked .
Scope: PCB fabrication and assembly files.
Fabrication tier: jlcpcb.
Known issues
Open issues recorded with this evidence. A defect keeps the board from ready; exceptions and advisories are disclosed but do not.
- #7209 advisory: PHASE_A inner copper is sized for 1 oz; the order must request 1 oz inner copper (JLCPCB's default is 0.5 oz), and manufacturing/manifest.json does not yet record ordered_copper (recorded 2026-10-18)
Current evidence passes the assembly release checks; this does not establish tested hardware performance.
- Bill of materials: passed — All42 exact LCSC identities match source parts;23 BOM groups,36 SMT CPL placements;J1-J5/RV1 manual assembly.
- Connectivity and design checks: passed — 0 errors/0warnings; all49 rules and ERC/LVS/manifest meta-checks passed;149 bound pads.
- Native design rules (DRC): passed — KiCad10.0.6 fresh zone refill with valid manufacturer custom rules:0 violations/0unconnected items. No DRC waivers.
- Manufacturing artifacts: passed — 23 BOM groups/42 exact identities,36 SMT placements,6 manual parts; complete Gerber/drill/drawings/KiCad source/firmware package and SHA256 integrity. CPL regenerated through manufacturer profile: D1/D2/D3=180 degrees, U1=270 degrees; library-qualified names preserve corrections. Other CPL fields unchanged; package archive and manifest verified.
- source reconstruction: passed — Fresh circuit source plus copper recipe reproduced zero-finding native/ERC/manufacturer gates. Component/pad/placement/net fingerprint enforced.
- firmware: passed — AVR compile866text/24data/1BSS and six-state host commutation test passed. Physical motor/thermal bring-up remains untested; start12V/0.5A supply limit,0.5A phase target,25% duty cap.
- smt drill clearance: passed — Issue5012 corrected actual-land overlap rule:0 overlaps; 14 vias relocated clear of SMT copper. Native/ERC/LVS/source replay gates passed; ordinary JLCPCB process.
- 45 alignment: passed — All8114 tracks follow0/45/90/135 degrees;91 repaired chords passed fresh source reconstruction, native DRC/ERC and manufacturer/LVS checks. Widths, layers, vias and physical pad/placement/net fingerprint unchanged.
Passed: this check passed for the recorded files. Failed: this check found a problem. Not run: no result was established. Unlisted checks have no reported result.
Renders
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Metrics
| Build Status | Assembly ready · 1 known issue |
|---|---|
| Nets routed | 100.0% |
| DRC violations | 0 |
| Layers | 4 |
| Board Size | 70 × 90 mm |
| Parts | 42 |
| Cost (per board) | $7.67 |
| Batch Qty | 5 boards |
| Batch Total | $38.36 |
| Data Generated | 2026-09-14T20:54:37.924258+00:00 |
Downloads
- Full manufacturing package (ZIP)
- KiCad project (ZIP)
- Gerber fabrication files (ZIP)
- Fabrication report (PDF)
- Bill of materials (CSV)
- Component placement (CSV)
- Schematic (PDF)
- Front assembly drawing (PDF)
- Back assembly drawing (PDF)
- Manufacturing instructions (TXT)
- Artifact manifest (JSON)
- Electrical and manufacturing checks (JSON)
- KiCad DRC report (JSON)