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diffpair_test_routed

Assembly ready

Four-channel LVDS link demonstrator

06-diffpair-test

Manufacturing readiness

Checked .

Scope: PCB fabrication and assembly files.

Current evidence passes the assembly release checks; this does not establish tested hardware performance.

  • Connectivity and design checks: passed — Zero errors/warnings; ERC, label/copper LVS and manifest pass; all four LVDS pair constraints pass.
  • Native design rules (DRC): passed — Fresh native DRC: zero violations/opens after saved zone refill; independent repeated refill has identical copper polygons. All tracks are orthogonal or exact 45 degrees.
  • Manufacturing artifacts: passed — Regenerated Gerbers, drawings and renders; project/source ZIP byte provenance and complete SHA256 manifest verified after fresh full checks.
  • Bill of materials: passed — Reviewed supplier identities;33 SMT placements and three explicitly sourced manual Samtec headers. Auto-matching disabled. Reviewed BOM/CPL contents unchanged and compared against the prior audited package.
  • drill pad overlap: passed — Zero actual drill/SMT-pad overlaps; four repaired positions reproduced from source. Standard through-vias only; signals confined to F.Cu/B.Cu and reference planes reserved.

Passed: this check passed for the recorded files. Failed: this check found a problem. Not run: no result was established. Unlisted checks have no reported result.

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Metrics

Build StatusAssembly ready
Nets routed100.0%
DRC violations0
Layers4
Board Size90 × 70 mm
Parts36
Cost (per board)$9.81
Batch Qty5 boards
Batch Total$49.03
Data Generated2026-09-10T18:38:29.116560+00:00

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